HSIC：高速集成电路
“High Speed Integrated Circuit”通常缩写为HSIC，以方便快速书写和使用。这一术语广泛应用于电子工程、通信技术等综合领域，泛指各类高速集成电路的设计与应用。其中文含义即“高速集成电路”，它在提升数据传输速率和系统性能方面发挥着关键作用。
High Speed Integrated Circuit具体释义
High Speed Integrated Circuit的英文发音
例句
- VHDL ( Very High Speed Integrated Circuit(HSIC) Hardware Description Language ) is widely applied in electronic design fields today.
- VHDL（超高速集成电路(HSIC)硬件描述语言）在电子设计领域中已得到了广泛用。
- Introduces the development of very high speed integrated circuit hardware description language ( VHDL ), and presents the design mathod of system on chip on the basis of VHDL and complex programmable logic device ( CPLD ).
- 介绍了超高速集成电路(HSIC)硬件描述语言（VHDL）的发展历程，并且论述了利用VHDL。在复杂可编程逻辑器件（CPLD）上进行系统芯片（SOC）设计的方法。
- Meanwhile, on base of this principle, adopts Verilog HDL to design high speed integrated circuit for equal observations of frequency, and uses EDA development tool QUARTUS ⅱ 3.0 to program CPLD, realizes main logic function such as counter;
- 同时在该原理基础上，采用了Veriloghdl语言设计了高速的等精度测频模块，并且利用EDA开发平台QUARTUSⅡ3.0对CPLD芯片进行写入，实现了计数等主要逻辑功能；
- With the rapid increase of signal frequency and decrease of feature sizes in high speed integrated circuit ( IC ) systems, interconnects play increasingly important roles, and the analysis of the time-domain response of interconnects becomes necessary to ensure the circuit designed working properly.
- 在高速集成电路(HSIC)系统当中，随着信号频率的增加和特征尺寸的减小，互连线的作用显得越来越重要，互连线的时域响应分析成了保证所设计的电路能正常工作的必要环节。
- Based on the trade-off of the data decompression difficulty, a method of test data compression using the Golomb algorithm is provided for the portable test equipment. Then the corresponding decompression circuit is designed with the VHDL ( very high speed integrated circuit hardware description language ).
- 基于解压缩实现难易程度的折衷考虑，提出了基于Golomb算法的便携式检测设备的测试向量压缩方法，采用VHDL方法设计了相应的硬件解压缩电路，并且将其应用于便携式飞参检测设备。
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