DFLL:数字锁频环
“数字锁频环”(Digital Frequency Locked Loop,简称DFLL)是一种广泛应用于通信、控制和信号处理等综合领域的电路技术。采用英文缩写DFLL,有助于在学术研究和工程实践中实现简洁高效的书写与交流。该术语目前尚未被严格细分至特定子类别,属于通用技术概念。
Digital Frequency Locked Loop具体释义
Digital Frequency Locked Loop的英文发音
例句
- In the process of signal digital intermediate-frequency received, digital down convertion, frequency tracking of carrier and phase locked loop are the keys.
- 在信号的中频数字接收过程中,数字下变频、载波频率与相位跟踪是设计的关键所在。
- The principle of voltage linear digital triggering of thyristor by EPROM is described and it is discussed to solve the frequency disturbance on digital trigger by phase locked loop.
- 描述了用EPROM实现晶闸管电压线性触发原理,讨论了用锁相环解决数字触发的频率扰动问题。
- The technology of Direct Digital Frequency Synthesis has been gradually applied into the field of achieving stable sig - nal generator as well as the prevalent use of phase - locked loop, following the development of techno - signal generator.
- 随着信号源技术的发展,在普遍使用锁相环技术实现稳定信号源的同时,直接频率合成技术(DDS)也日渐广泛运用。
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