RISC:简化指令集计算机
“精简指令集计算机”是计算机体系结构中的一类重要设计理念,其英文全称为“Reduced Instruction Set Computer”,常缩写为RISC,以便于快速书写和日常使用。这一术语在计算机科学与电子工程领域尤为常见,强调通过简化指令集来提高处理器执行效率和性能。
Reduced Instruction Set Computer具体释义
Reduced Instruction Set Computer的英文发音
例句
- Reduced Instruction Set Computer(RISC).
- 精简指令集计算机。
- Traditional Reduced Instruction Set Computer(RISC) ( RISC ) and Digital Signal Processor ( DSP ) have different application areas due to their different Instruction Set Architecture ( ISA ) and micro-architecture.
- 传统的精简指令集处理器(RISC)和数字信号处理器(DSP)各自具有不同的指令集结构和微结构特点,适合于不同的应用领域。
- This paper introduces a IP phone system based on DSP and ARM Reduced Instruction Set Computer(RISC) ( RISC ) double core processor.
- 本文介绍的是一种基于DSP和ARM精简指令集处理器(RISC)双CPU处理器方案研发的IP电话系统。
- Branch - delay is one of the RISC ( Reduced Instruction Set Computer(RISC) ) technology characters.
- 延迟转移是RISC技术特点之一。
- ARM system structure inherits such characters of RISC ( Reduced Instruction Set Computer(RISC) ) as load / store structure, fixed 32 bit instruction and format of three address instruction.
- ARM体系结构继承了RISC结构的加载/存储体系结构、固定长32位指令和三地址指令格式等特性。
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